A CMOS sensor (Complementary Metal Oxide Semiconductor) is the image sensor technology that has replaced CCD in nearly every modern digital camera, from smartphones to medium format. The defining characteristic is that each photosite includes its own amplifier and readout circuitry, allowing the sensor to convert charge to voltage at the pixel level. This architectural choice enables lower power consumption, faster readout speeds, and on-chip features like phase-detect autofocus, dual-gain ISO, and pixel binning that were impractical on the older CCD design.
CCD (Charge-Coupled Device) sensors, dominant from the 1970s through the 2000s, transferred charge across the entire array to a single amplifier at the corner. This serial readout produced excellent image quality and uniformity but was slow and power-hungry. CMOS, originally developed for low-cost video applications, was considered noisier and inferior for stills work through the 1990s. The breakthrough came when Sony, Canon, and others perfected backside illumination (BSI) and improved per-pixel amplifier matching in the 2000s. By 2010, CMOS had matched or exceeded CCD on dynamic range and noise, and the transition was complete by about 2015 outside of specialized industrial applications.
The per-pixel amplifier architecture has performance consequences that shape the modern camera. Fast readout allows burst rates of 20, 30, or even 120 frames per second on flagship bodies. Electronic shutter modes that scan the sensor in milliseconds (rather than the multiple-second readouts of older designs) enable silent shooting and flash sync speeds beyond mechanical limits. On-sensor phase-detection points, embedded directly in the pixel array, deliver the eye-tracking and subject-recognition autofocus that defines current bodies. Dual native ISO sensors with two parallel readout paths give cinema-grade dynamic range at both low and high gain.
The main weakness of CMOS, particularly in its earlier generations, was rolling shutter distortion. Because the sensor reads top-to-bottom rather than capturing all pixels simultaneously, fast subject motion or rapid camera pans produced skewed verticals and the jello effect in video. Modern stacked-CMOS designs, where the photodiode layer is bonded to a separate logic layer with DRAM caching (Sony’s Exmor RS, Canon’s stacked CMOS in the R3 and R5 mark II), have reduced rolling shutter scan times to a few milliseconds, approaching global shutter performance. True global shutter CMOS, where every pixel exposes simultaneously, is appearing in 2023-onward flagship bodies like the Sony a9 III.
Manufacturing economics drove the CMOS takeover as much as performance did. CMOS sensors share fabrication processes with general-purpose chips, allowing them to ride the cost curve of standard semiconductor production. Smartphone demand pushed pixel pitches down to roughly 0.6 to 1.0 micrometers and drove BSI and stacked architectures into mass production. The same factories produce sensors for full-frame cameras at 36x24mm and phone sensors at 1/2.3 inch, with shared process technology.
For the working photographer, the CMOS dominance means that comparisons across brands and generations come down to specific implementations rather than fundamental sensor type. The relevant questions are pixel pitch, BSI vs FSI, stacked vs non-stacked, ADC bit depth, and dual-gain implementation, not whether the sensor is CMOS. The exceptions, such as Foveon X3 sensors (Sigma) and a handful of medium format CCD bodies still in use, are niches rather than mainstream alternatives.